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SN74LVTH16501DGGR 3.3-V ABT 18-Bit Universal Bus Transceivers With 3-State Outputs


source: | post time:2010-01-22

Description

The ’LVTH16501 devices are 18-bit universal bus transceivers designed for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment.

Data flow in each direction is controlled by output-enable (OEAB and OEBA), latch-enable (LEAB and LEBA), and clock (CLKAB and CLKBA) inputs. For A-to-B data flow, the devices operate in the transparent mode when LEAB is high. When LEAB is low, the A data is latched if CLKAB is held at a high or low logic level. If LEAB is low, the A data is stored in the latch/flip-flop on the low-to-high transition of CLKAB. When OEAB is high, the outputs are active. When OEAB is low, the outputs are in the high-impedance state.

Data flow for B to A is similar to that of A to B but uses OEBA, LEBA, and CLKBA.

Features

  • Members of the Texas Instruments
    Widebus™ Family
  • UBT™ Transceiver Combines D-Type
    Latches and D-Type Flip-Flops for
    Operation in Transparent, Latched, or
    Clocked Mode
  • State-of-the-Art Advanced BiCMOS
    Technology (ABT) Design for 3.3-V
    Operation and Low Static-Power
    Dissipation
  • Support Mixed-Mode Signal Operation (5-V
    Input and Output Voltages With 3.3-V VCC)
  • Support Unregulated Battery Operation
    Down to 2.7 V
  • Typical VOLP (Output Ground Bounce)
    <0.8 V at VCC = 3.3 V, TA = 25°C
  • Ioff and Power-Up 3-State Support Hot
    Insertion
  • Bus Hold on Data Inputs Eliminates the
    Need for External Pullup/Pulldown
    Resistors
  • Distributed VCC and GND Pins Minimize
    High-Speed Switching Noise
  • Flow-Through Architecture Optimizes PCB Layout
  • Latch-Up Performance Exceeds 500 mA Per JESD 17
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)

Widebus and UBT are trademarks of Texas Instruments.

Pricing / Packaging :

Price Packaging
Device Status Temp (oC) Price | Quantity Package| Pins Top Side Marking Package QTY| Package Carrier
74LVTH16501DGGRE4 ACTIVE -40 to 85 1.43 | 1ku TSSOP (DGG)| 56 View 2000 | LARGE T&R Download CAD Format for this Footprint
74LVTH16501DGGRG4 ACTIVE -40 to 85 1.43 | 1ku TSSOP (DGG)| 56 View 2000 | LARGE T&R
74LVTH16501DLRG4 ACTIVE -40 to 85 1.54 | 1ku SSOP (DL)| 56 View 1000 | LARGE T&R Download CAD Format for this Footprint
SN74LVTH16501DGGR ACTIVE -40 to 85 1.43 | 1ku TSSOP (DGG)| 56 View 2000 | LARGE T&R Download CAD Format for this Footprint
SN74LVTH16501DL ACTIVE -40 to 85 2.05 | 1ku SSOP (DL)| 56 View 20 | TUBE Download CAD Format for this Footprint
SN74LVTH16501DLG4 ACTIVE -40 to 85 2.05 | 1ku SSOP (DL)| 56 View 20 | TUBE Download CAD Format for this Footprint
SN74LVTH16501DLR ACTIVE -40 to 85 1.54 | 1ku SSOP (DL)| 56 View 1000 | LARGE T&R Download CAD Format for this Footprint

source:ShenZhen henlito electronic co.,ltd.

web:www.henlito.com


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