SN74CBT3125D Quadruple FET Bus Switch

Pricing / Packaging

Device	Status	Temp (oC)	Price | Quantity	Package| Pins	Top Side Marking
SN74CBT3125D	ACTIVE	-40 to 85	0.34 | 1ku	SOIC (D)| 14	View
SN74CBT3125DBLE	OBSOLETE	-40 to 85		SSOP (DB)| 14	View
SN74CBT3125DBQR	ACTIVE	-40 to 85	0.31 | 1ku	SSOP/QSOP (DBQ)| 16	View
SN74CBT3125DBQRE4	ACTIVE	-40 to 85	0.31 | 1ku	SSOP/QSOP (DBQ)| 16	View
SN74CBT3125DBQRG4	ACTIVE	-40 to 85	0.31 | 1ku	SSOP/QSOP (DBQ)| 16	View
SN74CBT3125DBR	ACTIVE	-40 to 85	0.31 | 1ku	SSOP (DB)| 14	View
SN74CBT3125DBRE4	ACTIVE	-40 to 85	0.31 | 1ku	SSOP (DB)| 14	View
SN74CBT3125DBRG4	ACTIVE	-40 to 85	0.31 | 1ku	SSOP (DB)| 14	View
SN74CBT3125DE4	ACTIVE	-40 to 85	0.34 | 1ku	SOIC (D)| 14	View
SN74CBT3125DG4	ACTIVE	-40 to 85	0.34 | 1ku	SOIC (D)| 14	View
SN74CBT3125DGVR	ACTIVE	-40 to 85	0.31 | 1ku	TVSOP (DGV)| 14
SN74CBT3125DGVRE4	ACTIVE	-40 to 85	0.31 | 1ku	TVSOP (DGV)| 14
SN74CBT3125DGVRG4	ACTIVE	-40 to 85	0.31 | 1ku	TVSOP (DGV)| 14
SN74CBT3125DR	ACTIVE	-40 to 85	0.31 | 1ku	SOIC (D)| 14	View
SN74CBT3125DRE4	ACTIVE	-40 to 85	0.31 | 1ku	SOIC (D)| 14	View
SN74CBT3125DRG4	ACTIVE	-40 to 85	0.31 | 1ku	SOIC (D)| 14	View
SN74CBT3125PW	ACTIVE	-40 to 85	0.34 | 1ku	TSSOP (PW)| 14	View
SN74CBT3125PWE4	ACTIVE	-40 to 85	0.34 | 1ku	TSSOP (PW)| 14	View
SN74CBT3125PWG4	ACTIVE	-40 to 85	0.34 | 1ku	TSSOP (PW)| 14	View
SN74CBT3125PWLE	OBSOLETE	-40 to 85		TSSOP (PW)| 14	View
SN74CBT3125PWR	ACTIVE	-40 to 85	0.31 | 1ku	TSSOP (PW)| 14	View
SN74CBT3125PWRE4	ACTIVE	-40 to 85	0.31 | 1ku	TSSOP (PW)| 14	View
SN74CBT3125PWRG4	ACTIVE	-40 to 85	0.31 | 1ku	TSSOP (PW)| 14	View
SN74CBT3125RGYR	ACTIVE	-40 to 85	0.40 | 1ku	VQFN (RGY)| 14	View
SN74CBT3125RGYRG4	ACTIVE	-40 to 85	0.40 | 1ku	VQFN (RGY)| 14	View

Description

The SN74CBT3125 quadruple FET bus switch features independent line switches. Each switch is disabled when the associated output-enable (OE)\ input is high.

To ensure the high-impedance state during power up or power down, OE\ should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Features

• Standard ¡¯125-Type Pinout (D, DB, DGV, and PW Packages)
• 5- Switch Connection Between Two Ports
• TTL-Compatible Input Levels

PDF

• SN74CBT3125 (Rev. I) (PDF 882 KB)
  19 Sep 2002

source£ºShenZhen henlito electronic co.,ltd.

web:www.henlito.com