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Lattice


source: | post time:2010-01-20

FPGA and PLD Product Families

Lattice actively participates in both the FPGA and PLD segments. Our FPGA (Field Programmable Gate Array) solutions deliver unique features, high performance, and excellent value for FPGA designs. We are also the leading supplier of low density CMOS PLDs in the world, and our CPLD and SPLD solutions deliver an optimal fit for a variety of PLD design challenges. 


Lattice's Product Portfolio


Mid-Range

The LatticeECP family was designed for customers who need FPGAs with digital signal processing ("DSP"), a significant amount of memory, and high-speed serial communications channels, but do not want to pay the price or power premiums of high end FPGAs. The LatticeECP family is able to serve this mid-range market due to careful circuit design choices aimed at achieving lower cost and various architectural enhancements to reduce power consumption.

We recently introduced the LatticeECP3 FPGA, the third generation of the value-based LatticeECP FPGA series. The ECP3 extends the functionality of prior generation families to new levels and provides designers with enhanced features and capabilities at a fraction of the power consumption and cost of competing devices. The power advantage is achieved by using various process and architectural enhancements as well as software power optimization techniques. This family is particularly well suited for deployment in wireless infrastructure and wireline access equipment, as well as video and imaging applications.                

Low Density

The MachXO family of versatile non-volatile reconfigurable PLDs is designed for applications traditionally implemented using CPLDs or low-capacity FPGAs. Widely adopted in a broad range of applications that require general purpose I/O expansion, interface bridging, and power-up management functions, MachXO PLDs offer the benefits of increased system integration by providing embedded memory, built-in PLLs, high performance LVDS I/O, remote field upgrade and a low power sleep mode, all in a single-device.  Designed for a broad range of low density applications, the MachXO PLD family is used in a variety of end markets including consumer, automotive, communications, computing, industrial, and medical.

The ispMach4000ZE family is designed for high performance and features an architecture optimized to ensure low power consumption. The ispMach4000ZE devices are offered in ultra-small, space saving packages and are targeted toward handheld and portable equipment.

Unlike traditional FPGAs that require an external device to load its application program, Lattice’s two generations of the non-volatile LatticeXP FPGA family embed a Flash memory block on-chip to store the program. This on-chip program memory offers customers several unique benefits. First, as a single chip solution it enables customers to reduce their board size. Second, without the comparatively long time delay caused by loading a program externally a customer’s equipment can start up much more quickly. Finally, because the program is stored on-chip a customer’s IP is more secure from theft. While broadly used across many market segments, we believe that the single-chip, instant-on, and high-security provided by the LatticeXP FPGA family make it particularly attractive for the security, surveillance, and display markets.

We offer the industry's broadest line of PLDs, based on our ispLSI, ispMACH™ and GAL product families. Our numerous SPLD families of GAL products are offered in over 200 speed, power, package, and temperature range combinations. 

Mixed Signal

Our Power Manager and ispClock™ families feature a combination of programmable logic and programmable analog circuitry that allows system designers to reduce system cost and design time by quickly and easily integrating a wide variety of power and clock management functions within a single integrated circuit. These products can replace numerous discrete components, reducing cost and conserving board space, while providing customers with additional design flexibility and time-to-market benefits.

Software and Intellectual Property

We strive to meet our customers’ needs by offering innovative and differentiated solutions that include not only silicon devices, but also design tools and intellectual property.

Our ispLEVER™software development tool suite, PAC-Designer™ software, and IP core program allow our customers to easily design and configure our devices for their unique systems.  IspLEVER software allows our customers to synthesize a design, perform analysis, debug, and download a logic configuration to our devices.

Lattice's IP core program ispLeverCORE™provides pre-tested, reusable functions, allowing our customers to focus on their unique system architectures. These IP cores provide industry-standard functions including PCI Express, DDR, Ethernet, CPRI, OBSAI, 7:1 LVDS, and embedded microprocessor. A number of independent IP providershave teamed up with Lattice to offer additional high quality, reusable IP cores. Partners are selected for their industry leadership, high development standards, and commitment to customer support.

 

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