Pricing, Packaging
Model | Status | Package | Pins | Temp. Range |
Price* (100-499) |
Price* (1000 pcs.) |
Production** Availability |
ROHS Compliant |
---|---|---|---|---|---|---|---|---|
ADG508FBN | Prodn | 16 ld PDIP | 16 | Ind | $4.64 | $3.94 | 02/26/2010 | N Material Declaration |
ADG508FBNZ | Prodn | 16 ld PDIP | 16 | Ind | $4.02 | $3.41 | 03/12/2010 | Y Material Declaration |
ADG508FBRN | Prodn | 16 ld SOIC | 16 | Ind | $4.64 | $3.94 | 02/26/2010 | N Material Declaration |
ADG508FBRN-REEL7 | Prodn | 16 ld SOIC | 16 | Ind | - | $3.94 | 05/21/2010 | N Material Declaration |
ADG508FBRNZ | Prodn | 16 ld SOIC | 16 | Ind | $4.02 | $3.41 | 05/14/2010 | Y Material Declaration |
ADG508FBRNZ-REEL7 | Prodn | 16 ld SOIC | 16 | Ind | - | $3.41 | 05/14/2010 | Y Material Declaration |
ADG508FBRUZ | Prodn | 16 | Ind | - | - | 02/26/2010 | Y Material Declaration | |
ADG508FBRUZ-REEL7 | Prodn | 16 | Ind | - | - | - | Y Material Declaration | |
ADG508FBRW | Prodn | 16 ld SOIC - Wide | 16 | Ind | $4.50 | $3.82 | 04/09/2010 | N Material Declaration |
ADG508FBRWZ | Prodn | 16 ld SOIC - Wide | 16 | Ind | $3.90 | $3.31 | 03/05/2010 | Y Material Declaration |
ADG508FBRWZ-REEL | Prodn | 16 ld SOIC - Wide | 16 | Ind | - | $3.31 | 02/26/2010 | Y Material Declaration |
PDF
ADG509FBRNZ
Description
The ADG508F is a CMOS analog multiplexer comprising 8 single channels. This multiplexer provides fault protection. Using a series n-channel, p-channel, n-channel MOSFET structure, both device and signal source protection is provided in the event of an overvoltage or power loss. The multiplexer can withstand continuous overvoltage in-puts from -40 V to +55 V. During fault conditions, the multiplexer input (or output) appears as an open circuit and only a few nanoamperes of leakage current will flow. This protects not only the multiplexer and the circuitry driven by the multiplexer, but also protects the sensors or signal sources which drive the multiplexer.
The ADG508F switches one of eight inputs to a common output as determined by the 3-bit binary address lines A0, A1 and A2. An EN input on each device is used to enable or disable the device. When disabled, all channels are switched OFF.
Features
ton 250 ns maximum toff 250 ns maximum
(- 40 V to + 55 V)
Functional Block Diagram for ADG508F
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