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SN74ABT162244DGGR 16-Bit Buffers/Drivers With 3-State Outputs


source: | post time:2010-01-22

Pricing / Packaging

Device Status Temp (oC) Package | Pins Top Side Marking Package QTY | Package Carrier
74ABT162244DGGRE4 ACTIVE -40 to 85 TSSOP (DGG) | 48 View 2000 | LARGE T&R Download CAD Format for this Footprint
74ABT162244DGGRG4 ACTIVE -40 to 85 TSSOP (DGG) | 48 View 2000 | LARGE T&R Download CAD Format for this Footprint
74ABT162244DGVRE4 ACTIVE -40 to 85 TVSOP (DGV) | 48 View 2000 | LARGE T&R Download CAD Format for this Footprint
74ABT162244DGVRG4 ACTIVE -40 to 85 TVSOP (DGV) | 48 View 2000 | LARGE T&R Download CAD Format for this Footprint
74ABT162244DLRG4 ACTIVE -40 to 85 SSOP (DL) | 48 View 1000 | LARGE T&R Download CAD Format for this Footprint
SN74ABT162244DGGR ACTIVE -40 to 85 TSSOP (DGG) | 48 View 2000 | LARGE T&R Download CAD Format for this Footprint
SN74ABT162244DGVR ACTIVE -40 to 85 TVSOP (DGV) | 48 View 2000 | LARGE T&R Download CAD Format for this Footprint
SN74ABT162244DL ACTIVE -40 to 85 SSOP (DL) | 48 View 25 | TUBE Download CAD Format for this Footprint
SN74ABT162244DLG4 ACTIVE -40 to 85 SSOP (DL) | 48 View 25 | TUBE Download CAD Format for this Footprint
SN74ABT162244DLR ACTIVE -40 to 85 SSOP (DL) | 48 View 1000 | LARGE T&R Download CAD Format for this Footprint

Description

The ’ABT162244 devices are 16-bit buffers and line drivers designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. These devices can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. These devices provide noninverting outputs and symmetrical active-low output-enable (OE)\ inputs.

The outputs, which are designed to source or sink up to 12 mA, include equivalent 25- series resistors to reduce overshoot and undershoot.

To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Features

  • Members of the Texas Instruments Widebus™ Family
  • Output Ports Have Equivalent 25- Series Resistors, So No External Resistors Are Required
  • Typical VOLP (Output Ground Bounce) <1 V at VCC = 5 V, TA = 25°C
  • High-Impedance State During Power Up and Power Down
  • Ioff and Power-Up 3-State Support Hot Insertion
  • Distributed VCC and GND Pins Minimize High-Speed Switching Noise
  • Flow-Through Architecture Optimizes PCB Layout
  • Latch-Up Performance Exceeds 500 mA Per JESD-17

Widebus is a trademark of Texas Instruments.

source:ShenZhen henlito electronic co.,ltd.

web:www.henlito.com


Prev:SN74ABT125DR Quadruple Bus Buffer Gates With 3-State Outputs
Next:SN74ABT16823DLR 18-Bit Bus Interface Flip-Flops With 3-State Outputs


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